reset logic fixed (initialize RTC vars after OTA)
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75e23973a3
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cc4daa0954
@ -2,6 +2,7 @@
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#define _CONFIGMANAGER_H
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#define _CONFIGMANAGER_H
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#include "globals.h"
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#include "globals.h"
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#include "reset.h"
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#include <Preferences.h>
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#include <Preferences.h>
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void saveConfig(bool erase = false);
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void saveConfig(bool erase = false);
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@ -9,6 +9,7 @@
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#include "display.h"
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#include "display.h"
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#include "power.h"
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#include "power.h"
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void reset_rtc_vars(void);
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void do_reset(bool warmstart);
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void do_reset(bool warmstart);
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void do_after_reset(void);
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void do_after_reset(void);
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void enter_deepsleep(const uint64_t wakeup_sec = 60,
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void enter_deepsleep(const uint64_t wakeup_sec = 60,
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@ -16,5 +17,6 @@ void enter_deepsleep(const uint64_t wakeup_sec = 60,
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unsigned long long uptime(void);
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unsigned long long uptime(void);
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extern RTC_NOINIT_ATTR runmode_t RTC_runmode;
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extern RTC_NOINIT_ATTR runmode_t RTC_runmode;
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extern RTC_NOINIT_ATTR uint32_t RTC_restarts;
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#endif // _RESET_H
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#endif // _RESET_H
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@ -48,7 +48,7 @@ static void defaultConfig(configData_t *myconfig) {
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myconfig->blescantime =
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myconfig->blescantime =
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BLESCANINTERVAL /
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BLESCANINTERVAL /
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10; // BT channel scan cycle [seconds/100], default 1 (= 10ms)
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10; // BT channel scan cycle [seconds/100], default 1 (= 10ms)
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myconfig->blescan = BLECOUNTER; // 0=disabled, 1=enabled
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myconfig->blescan = BLECOUNTER; // 0=disabled, 1=enabled
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myconfig->wifiscan = WIFICOUNTER; // 0=disabled, 1=enabled
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myconfig->wifiscan = WIFICOUNTER; // 0=disabled, 1=enabled
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myconfig->wifiant = 0; // 0=internal, 1=external (for LoPy/LoPy4)
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myconfig->wifiant = 0; // 0=internal, 1=external (for LoPy/LoPy4)
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myconfig->macfilter = MACFILTER; // 0=disabled, 1=enabled
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myconfig->macfilter = MACFILTER; // 0=disabled, 1=enabled
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@ -159,4 +159,7 @@ int version_compare(const String v1, const String v2) {
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return 1;
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return 1;
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}
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}
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void eraseConfig(void) { saveConfig(true); }
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void eraseConfig(void) {
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reset_rtc_vars();
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saveConfig(true);
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}
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@ -140,6 +140,7 @@ void setup() {
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esp_log_level_set("*", ESP_LOG_NONE);
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esp_log_level_set("*", ESP_LOG_NONE);
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#endif
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#endif
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// load device configuration from NVRAM and set runmode
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do_after_reset();
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do_after_reset();
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// print chip information on startup if in verbose mode after coldstart
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// print chip information on startup if in verbose mode after coldstart
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@ -206,9 +207,6 @@ void setup() {
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strcat_P(features, " PMU");
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strcat_P(features, " PMU");
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#endif
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#endif
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// read (and initialize on first run) runtime settings from NVRAM
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_ASSERT(loadConfig()); // includes initialize if necessary
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// now that we are powered, we scan i2c bus for devices
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// now that we are powered, we scan i2c bus for devices
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if (RTC_runmode == RUNMODE_POWERCYCLE)
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if (RTC_runmode == RUNMODE_POWERCYCLE)
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i2c_scan();
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i2c_scan();
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@ -306,7 +306,7 @@ void get_status(uint8_t val[]) {
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payload.reset();
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payload.reset();
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payload.addStatus(read_voltage(), (uint64_t)(uptime() / 1000ULL),
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payload.addStatus(read_voltage(), (uint64_t)(uptime() / 1000ULL),
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temperatureRead(), getFreeRAM(), rtc_get_reset_reason(0),
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temperatureRead(), getFreeRAM(), rtc_get_reset_reason(0),
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rtc_get_reset_reason(1));
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(uint8_t)RTC_restarts);
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SendPayload(STATUSPORT);
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SendPayload(STATUSPORT);
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};
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};
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@ -18,6 +18,11 @@ RTC_DATA_ATTR unsigned long long RTC_millis = 0;
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timeval sleep_stop_time;
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timeval sleep_stop_time;
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void reset_rtc_vars(void) {
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RTC_runmode = RUNMODE_POWERCYCLE;
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RTC_restarts = 0;
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}
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void do_reset(bool warmstart) {
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void do_reset(bool warmstart) {
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if (warmstart) {
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if (warmstart) {
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ESP_LOGI(TAG, "restarting device (warmstart)");
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ESP_LOGI(TAG, "restarting device (warmstart)");
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@ -38,13 +43,15 @@ void do_after_reset(void) {
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struct timeval sleep_stop_time;
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struct timeval sleep_stop_time;
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uint64_t sleep_time_ms;
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uint64_t sleep_time_ms;
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// read (and initialize on first run) runtime settings from NVRAM
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loadConfig();
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switch (rtc_get_reset_reason(0)) {
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switch (rtc_get_reset_reason(0)) {
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case POWERON_RESET: // 0x01 Vbat power on reset
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case POWERON_RESET: // 0x01 Vbat power on reset
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case RTCWDT_BROWN_OUT_RESET: // 0x0f Reset when the vdd voltage is not
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case RTCWDT_BROWN_OUT_RESET: // 0x0f Reset when the vdd voltage is not
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// stable
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// stable
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RTC_runmode = RUNMODE_POWERCYCLE;
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reset_rtc_vars();
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RTC_restarts = 0;
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break;
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break;
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case SW_CPU_RESET: // 0x0c Software reset CPU
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case SW_CPU_RESET: // 0x0c Software reset CPU
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